Description
Observable timing discrepancy in some Intel(R) Processors may allow an authenticated user to potentially enable information disclosure via local access.
CVSS breakdown
CVSS 3.1
Attack Vector
Local
Attack Complexity
Low
Privileges Required
Low
User Interaction
None
Scope
Unchanged
Confidentiality
Low
Integrity
None
Availability
None
Affected products
References
- MISChttps://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-00464.html
- MISChttps://security.netapp.com/advisory/ntap-20210611-0005/
- VENDOR_ADVISORYhttps://www.debian.org/security/2021/dsa-4934
- MAILING_LISThttps://lists.debian.org/debian-lts-announce/2021/07/msg00022.html
- MISChttps://cert-portal.siemens.com/productcert/pdf/ssa-309571.pdf
Updated 18m ago · 8 sources